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Qty 10 * 74HC573 74HC573D octal dtype trans latch smd


The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC573; 74HCT573 has octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches. When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D input changes. When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches.
The 74HC573; 74HCT573 is functionally identical to:
74HC563; 74HCT563, but inverted outputs
74HC373; 74HCT373, but different pin arrangement
Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
Useful as input or output port for microprocessors and microcomputers
3-state non-inverting outputs for bus oriented applications
Common 3-state output enable input
Functionally identical to 74HC563; 74HCT563 and 74HC373; 74HCT373
Complies with JEDEC standard no. 7A
HBM EIA/JESD22-A114-C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Specified from -40 C to +85 C and from -40 C to +125 C
The chip comes in a 20 pin Small Outline package.



Qty 10 * 74HC573 74HC573D octal dtype trans latch smd